The present invention relates generally to data processing and, more particularly, to a method and apparatus for identifying outlier data.
Technology advancements in the manufacturing industry have resulted in many new and innovative manufacturing processes. Today's manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (e.g., patterning, etching, doping, ion implanting, etc.), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Generally, a set of processing steps is performed across a group of semiconductor wafers, sometimes referred to as a lot. For example, a process layer that may be composed of a variety of different materials may be formed across a semiconductor wafer. Thereafter, a patterned layer of photoresist may be formed across the process layer using known photolithography techniques. Typically, an etch process is then performed across the process layer using a patterned layer of photoresist as a mask. This etching process results in the formation of various features or objects in the process layer. Such features may be used as, for example, a gate electrode structure for a transistor, a conductive line, or an isolation structure.
The manufacturing tools within a semiconductor manufacturing facility typically communicate with a manufacturing framework or a network of processing modules. Each manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which a manufacturing network is connected, thereby facilitating communications between the manufacturing tool and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script, which can be a software program that automatically retrieves the data needed to execute a specific manufacturing process.
FIG. 1 illustrates a wafer map of a typical semiconductor wafer 100. The semiconductor wafer 100 typically includes a plurality of individual semiconductor die 110 arranged in a grid 120. Typically, various data is collected during or after the fabrication of the wafer 100 and/or die 110. This data may include performance data, such as the yield of the wafer 100 (i.e., which die 110 are functional), the speed of each die 110, the power consumption of each die 110, etc. This data may also include metrology data relating the fabrication of the wafer, such as process layer thickness, critical dimensions, etc. Hence, the data may be binary (e.g., yield) or continuous (e.g., speed). Binary data may become continuous when the results for multiple wafers are combined. For example, the yield of die 110 in a certain position within the grid 120 may be represented as a percentage.
Data collected during the fabrication of the wafer 100 may be shown on a wafer map that imposes the data over the structure of the wafer 100, as shown by the yield data presented on the wafer map in FIG. 1. Only a subset of the exemplary yield percentages is shown to avoid cluttering the wafer map. A wafer map may be directed at a particular wafer, or may combine data for multiple wafers, commonly referred to as a stacked wafer map. Although the data in FIG. 1 is illustrated as being shown using a number, it is also common to use color shadings to reflect the underlying data. For example, die locations with high yields may be shown in shades of green, while die locations with decreasing yields may be shown in shades of yellow or red.
During or after processing of a wafer, the manufacturing system may acquire various metrology or performance data, such as described above. Based on the accumulated data, a statistical analysis may be performed. This process may include analyzing various characteristics (e.g., metrology information, speed grades, etc.) relating to the quality of the processed die. The statistical analysis provides for a continuous data stream that provides indications of the characteristics of various portions of a plurality of wafers. As indicated above, even binary-type data, (e.g., whether a particular wafer region passes a test or not), may become an analog-style continuous signal when analyzing data relating to several wafers. Accordingly, state-of-the-art systems provide analog, continuous data relating the characteristics of the die 110 of various wafers at various positions.
Analyzing this continuous data relating to a plurality of wafers to identify a problem region across several wafers is difficult. Existing pattern recognition approaches typically analyze binary patterns, such as wafer maps of yield on a single wafer to identify and classify faults. For example, the pattern recognition unit differentiates between random defect distributions and localized defects, such as a handling scratch. These pattern recognition techniques do not work well with continuous data. State-of-the-art standard deviation analysis typically does not provide efficient multi-wafer data analysis since each analysis of a portion of several wafers provides many different results that are difficult to quantify as a single data representation. Therefore, analysis of multiple wafer data sets for identifying a common problem area across several wafers may be inefficient and cumbersome.
This section of this document is intended to introduce various aspects of art that may be related to various aspects of the present invention described and/or claimed below. This section provides background information to facilitate a better understanding of the various aspects of the present invention. It should be understood that the statements in this section of this document are to be read in this light, and not as admissions of prior art. The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.